At The Six Semiconductor (TSS), a rapidly growing start-up, our vision is to offer best in class mixed-signal IP combined with exceptional service, thus enabling SOC companies to bring their product to market in highest quality and shortest time. When compared to competitors, our IP achieve higher performance at lower power and area, while offering the flexibility and ease of integration to our customers. Our team is highly experienced with a long list of achievements and accomplishments in the semiconductor industry.

As a Layout Design Engineer at TSS you will be working closely with both our digital and analog teams to create extraordinary AMS designs. The right candidate will thrive in a fast-paced environment working on various levels of the design with endless learning opportunities.


  • Work closely with schematic design team to do complex layout for mixed signal and analog circuits
  • Work closely with digital place and route team to ensure full custom layout can be integrated
  • Floorplan of high-speed IPs and IOs such as CDR, RX, TX, GPIOs etc.
  • Deliver clean layout views to internal and external customers
  • Debug and fix LVS,DRC,ERC etc
  • Ensure layout meets reliability and spec requirements (PEX, EM, IR, Self-heating, PERC)
  • Propose and implement layout design flow improvements as needed


  • Typically requires 2+ years of experience in analog/mixed-signal layout design of deep SubMicron CMOS circuits (28nm and below preferred).
  • Experience dealing with and generating different Physical views (LEF, GDS, DEF etc).
  • Experience building layout with stringent matching, speed, area and power requirements
  • Experience with custom and standard cell-based floor planning and hierarchical layout assembly.
  • Great understanding of IR drop, RC delay, electro-migration, self-heating and cross capacitance.
  • High-level proficiency in interpretation of DRC, ERC, LVS, etc. reports.
  • Knowledge of industry leading layout tools (Virtuoso, Custom Compiler or similar).
  • Scripting/flow automation experience in PERL, PYTHON or SKILL is a plus, but not required.
  • Experience with layout of SerDes IP such as TX, RX, PLL is a plus

If you love to work and grow in a fast paced environment, please send your resume to  We look forward to talking to you.